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    Senior SRAM Circuit Design Engineer

    2100 NVIDIA USA
    Santa Clara, CA FULL_TIME 168,000 USD - 264,500 USD 2026-07-06

    About 2100 NVIDIA USA

    NVIDIA has been at the forefront of transforming computer graphics, PC gaming, and accelerated computing for over 25 years. The company's invention of the GPU in 1999 revolutionized the PC gaming market and modern computer graphics. More recently, GPU deep learning has fueled the modern AI era, defining the future of computing with GPUs acting as the brains of AI-driven computers, robots, and self-driving cars. NVIDIA fosters a diverse and supportive environment that inspires innovation and impact.

    About the Position

    Introduction

    NVIDIA is seeking a skilled and creative Senior SRAM Circuit Design Engineer to join its Digital IP (DIP) group. This team develops IP for all NVIDIA chips, working closely with SOC design, silicon testing, and productization teams. The role focuses on developing sophisticated SRAM compilers and contributing to next-generation computing driven by AI and GPUs.

    Responsibilities

    • Embedded SRAM Design: Perform transistor-level circuit design, oversee layout implementation, and conduct physical and logical verification and debug of SRAM macros.
    • SRAM Compiler Development: Envision, define, and code efficient methods to automate the simultaneous assembly and validation of multiple unique SRAM macros leveraging NVIDIA's extensive compute resources.
    • Advanced Development: Explore the potential of future process nodes and develop techniques to achieve optimal power, performance, and area characteristics.
    • Guidance for SOC Design and Productization: Collaborate with SOC design partners to meet performance and cost goals, guide silicon test and characterization efforts, and work with productization teams for new silicon readiness for real-world applications.

    Requirements

    • BSEE minimum (or equivalent experience); MSEE or PhD preferred.
    • 8+ years of SRAM design experience with a strong background in digital circuit design, layout, and validation on advanced FinFET and nanosheet processes.
    • Prior design experience in single-port, dual-port, or register file SRAM-based macros, including complex circuits like self-timed logic and sense-amplifiers.
    • Familiarity with Cadence Virtuoso schematic and layout capture tools.
    • Proven track record of delivering silicon IP into production.

    Nice to Have

    • Self-motivation, attention to detail, and excellent written, verbal, and presentation skills.
    • Advanced skills in AI coding and analysis tools (e.g., Codex, Claude Code).
    • Silicon testing/debug experience.

    Benefits

    NVIDIA offers highly competitive salaries and a comprehensive benefits package. For more details, visit www.nvidiabenefits.com.

    About Company

    NVIDIA has been at the forefront of transforming computer graphics, PC gaming, and accelerated computing for over 25 years. The company's invention of the GPU in 1999 revolutionized the PC gaming market and modern computer graphics. More recently, GPU deep learning has fueled the modern AI era, defining the future of computing with GPUs acting as the brains of AI-driven computers, robots, and self-driving cars. NVIDIA fosters a diverse and supportive environment that inspires innovation and impact.

    How to Apply

    Applications for this job will be accepted at least until July 6, 2026. Please apply through the provided application link.

    Apply Now

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    Location

    Santa Clara, CA

    Type

    FULL_TIME

    Keywords

    SRAM Design
    Circuit Design
    Digital Circuit Design
    Layout
    FinFET
    Nanosheet
    Cadence Virtuoso
    SOC Design
    Silicon IP
    AI
    GPU
    Semiconductor
    Verified Company

    Senior SRAM Circuit Design Engineer

    2100 NVIDIA USA